The manufacturing of semiconductor devices and related thin film circuitry usually involves etching of specific layers comprising the device. Typically, the area to be etched is masked by material such as photoresist with the mask forming a pattern of lines and areas exposing the layer to be etched. In earlier approaches, the etching was carried out by a wet chemical method in which the etchant material, typically oxidizing mineral acids, contacted the exposed surface.
More recent processes employ gas plasmas, particularly fluorine based gases selected from the saturated halocarbon series, which eliminate some of the undesirable effects of wet chemistry. However, in both methods the etching was basically isotropic. With isotropic etching random etching proceeds at a uniform rate in all directions. As the surface to be etched is removed, the etching action takes place not only vertically into the surface, but also horizontally against the edge of the recess created by the etching. Thus, the area to be etched suffers undercutting in which the material is etched not only vertically in line with the edge of the opening in the photoresist mask, but also it extends underneath the photoresist mask. Typically this undercutting extends horizontally in substantially the same degree as the vertical etching.
As the trend toward miniaturization continues, scaling down to the micron and submicron dimension regions becomes a reality. This imposes strict demands on etch profiles, characteristically in the direction of vertical etch profiles with insignificant undercutting. This mode of plasma etching, commonly referred to as anisotropic etching, is the result of directional effects that suppress isotropic etching. Ideally, it provides for a vertical etch wall on a plane closely approximating that delineated by the resist edge prior to the etching operation.
As techniques of lithography improve, line patterns of micron and submicron dimensions in photoresist images become possible. In order to effectively transfer these images to the various substrates, reliable, reproducible anisotropic etching is necessary. In the past, in order to compensate for the undercutting effect of isotropic etching, the line width in the mask was made narrower than the desired line width in the layer to be etched, anticipating the widening of the line resulting from undercutting. With the demand for much smaller dimensions of line width and spaces, the lack of control and reproducibility resulting from undercutting, has made isotropic etching unacceptable.
Other prior art techniques have employed reactive ion etching performed at low pressure. However, while this technique can produce some anisotropically etched structures with some selectivity, there is considerable uncertainty as to radiation damage due to the highly energetic incident ion flux.
Another problem associated with very large scale integrated silicon circuits (VLSI) is the desirability that there be a reasonably high selectivity in the etch rate of polysilicon with respect to the etch rate of the underlying silicon oxide to provide enough control during the etching for the preservation of thin and ultrathin silicon oxide dielectric underlayers in field effect devices.
It is therefore a primary object of the present invention to provide a plasma etching technique for utilization during semiconductor fabrication in which highly efficient polysilicon etching takes place with a high degree of selectivity with respect to the etching of silicon oxide, and wherein highly anisotropic etching takes place to provide substantially vertical profiles in the features etched in the polysilicon layer, where the removal process is primarily due to chemical interactions and is void of adverse radiation damage effects.